SmolDVI
Verilog
★ 1
updated 3y ago
⑂ fork
Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs
No plain-English explanation yet — one is being written right now. Check back in a minute.
Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs
No plain-English explanation yet — one is being written right now. Check back in a minute.