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TinyCoDesign
Minimal FPGA hardware/software co-design demo with UART protocol, scratchpad memory, and an int8 dot-product accelerator, plus Python/C++ runtimes.
Verilog ★ 27 2mo agoExplain → -
MAPS
Mini AI PC Simulator connecting a Python TensorC compiler, a C mini OS, and a C++ RV32I CPU/NPU simulator.
C++ ★ 3 1mo agoExplain → -
ramulator2_HBM3
Added HBM3-related functionalities to the original Ramulator2 simulator, enabling simulation of HBM3 operations.
C++ ★ 1 7mo agoExplain →
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