Miodrag Milanović Claim this profile

FPGA 101 - Workshop materials

MicroPython - legacy branch contain old experiments, and experimental for new work

Documenting the Anlogic FPGA bit-stream format.

Enigma in FPGA

Cross compile FPGA tools

GROM-8 CPU

Dual MikroBUS board for Upduino 2 FPGA

Altair and other S-100 bus machines on FPGA

Anlogic examples with Yosys

Proposal for FPGA workshop badge for Hackaday Belgrade 2018

VeriEMU - MAME including Verilator FPGA library for testing verilog core implementations

NetList Editor

Galaksija tape tool

No description.

DOSPlay

:seedling: Open source ecosystem for open FPGA boards

MacOS resources needed for cross compile

Retro Commander

No description.

Docker image containing builds of useful open source FPGA tools

No description.

FPGA Command Line Interface

MAME

Verilog terminal and Verilator test

PicoRV32 - A Size-Optimized RISC-V CPU

E203 Anlogic with Yosys

No description.

Orao tape tool

Torc: Tools for Open Reconfigurable Computing

ABC: System for Sequential Logic Synthesis and Formal Verification

LiteX boards files

No description.

Cyclone V bitstream reverse-engineering project

Priručnik za asemblersko programiranje na procesorima iz familije Intel 80x86

Verilator open-source SystemVerilog simulator and lint system

A very simple, fast, multithreaded, platform independent HTTP and HTTPS server and client library implemented using C++11 and Boost.Asio. Created to be an easy way to make REST resources available from C++ applications.

Asio C++ Library

A very simple, fast, multithreaded, platform independent WebSocket (WS) and WebSocket Secure (WSS) server and client library implemented using C++11, Boost.Asio and OpenSSL. Created to be an easy way to make WebSocket endpoints in C++.

GNU toolchain for RISC-V, including GCC

No description.

Docker image to make self-extracting 7zip archives (multi-platform)

An attempt at a small Verilog implementation of the original Apple 1 on an iCE40 FPGA

No description.

:seedling: Icarus Verilog pre-built binaries: GNU/Linux(+ARM), Windows and Mac OS

Build Customized FPGA Implementations for Vivado

No description.

Bare Metal Compatibility Library for the Freedom Platform

A linker script generator for SiFive's Freedom platform

Mutation Cover with Yosys (MCY)

MXE Docker environment

Lattice iCE40: development platform for PlatformIO

:snowflake: Visual editor for open FPGA boards

A refreshed Python toolbox for building complex digital hardware

No description.

Naive Educational RISC V processor

A Linux-capable RISC-V multicore for and by the world

OpenTitan: Open source silicon root of trust

Package manager and build abstraction tool for FPGA/ASIC development

An abstraction library for interfacing EDA tools

Icarus Verilog

Documenting the Lattice ECP5 bit-stream format.

Niklas Een's ABC/ZZ framework

Git mirror of https://sourceforge.net/projects/rapidsmith/

chipy hdl

C++ Library Manager for Windows, Linux, and MacOS

No description.

:seedling: Icestorm, Arachne-pnr and Yosys pre-built binaries: GNU/Linux(+ARM), Windows and Mac OS

Web++

SystemVerilog compiler and language services

Yosys Open SYnthesis Suite

SystemVerilog frontend for Yosys

PicoGraph is a Pi Pico 2 ISA video card that supports several PC graphics standards using DisplayLink

Save time and cost when using GitHub Actions

Fork of Small Computer Monitor from Stephen C Cousins

System Software for Z80/Z180/Z280 Computers

Multi-platform nightly builds of open source digital design and verification tools

Build your hardware, easily!

Linux on LiteX-VexRiscv

Small footprint and configurable DRAM core

Kölsch Computer

Orao IDE-DOS tools

AGM bitstream utilities and decoded files from Supra

nextpnr portable FPGA place and route tool

Staging repo for Yosys command reference build. The contents of this repository are autogenerated from Yosys source.

Modular Application Utilities

SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

prjoxide database

Documenting Lattice's 28nm FPGA parts

Sequence of Covers with Yosys

Equivalence checking with Yosys

Experimental flows using nextpnr for Xilinx devices

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Plugins for Yosys developed as part of the F4PGA project.

Utility to ease bundling libraries into executables for OSX

Unofficial picosat github mirror

A FPGA friendly 32 bit RISC-V CPU implementation

No description.

No description.

GNAT for Fedora 33

MAME Build Tools

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)

No description.

An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!

No description.

Yosys Plugins

Quickstart binaries for flashing ULX3S to factory-default state

Open Source Software for Developing on the Freedom E Platform

fork of debit from https://code.google.com/p/debit/

:feet: E-Commerce template for Jekyll

Place and route tool for FPGAs

Qt Quick integration for Dear ImGui

Blog

Cross-platform, graphics API agnostic, "Bring Your Own Engine/Framework" style rendering library.

Image library.

Chocolate Doom port to STM32F429 evaluation board

Experiments

C++17 library facilities for older compilers

No description.

GENie - Project generator tool

Collection of .h snippets used across multiple projects (a.k.a. base library)

Standard threads implementation currently still missing on MinGW GCC on Windows

My C# tools for updating MAME

Retro Commander

No description.